1. In this part you are asked to recognize what a given segment of machine code does, by translating it into assembly code, and annotating it with expressions in a high level language like C. This process, from binary code back to source code, is called "disassembling." Disassemble the following machine code into operations and arguments, e.g., ADD R1, R2, R3. Explain what the whole program does, either in plain English (e.g., it calculates the product of R1 and R2) or in C type of pseudo code (e.g, R3 = R1 * R2.) Note: you need to make up unique labels for branch instructions in your assembly code. Addr: Code Ох00 07FF Ох02 240E Ох04 1E0C Ох06 250A Ох08 03F9 Ox0A OE00 Охос 24C2 ОхОЕ 3C00

C++ Programming: From Problem Analysis to Program Design
8th Edition
ISBN:9781337102087
Author:D. S. Malik
Publisher:D. S. Malik
Chapter12: Points, Classes, Virtual Functions And Abstract Classes
Section: Chapter Questions
Problem 19SA
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The following instruction set is supported by a simple processor, which is similar to what
we discussed in the class, with a few new instructions added. The format of most
instructions is defined as follows.
bits 15:14 13:10 9 8:6 5:3
2:0
field unused opcode w
srcl src2 dst
where the fields are defined as follows.
opcode : operation to be performed by the processor
write back ALU output to register file (1= yes, 0 = no)
address of the first ALU operand in the register file
address of the second ALU operand in the register file
address in the register file where the output is written
w:
srcl:
src2:
dst:
For opcodes BEQ, BLEZ and JUMP, the 6 least significant bits (5:0) give an address in
the instruction memory, which is byte-addressed. The opcode HALT has all operand bits
(9:0) being 0. When an instruction has only two operands, the field for the unused
operand is filled with 0-bits. For example, bits (5:3) for SLL are all zero because src2 is
not used.
The opcode and meaning of these instructions are listed in the following table.
орcode
ADD
Binary encoding
Operation
R[src1] +R[src2]→ R[dst]
R[srcl] – R[src2] → R[dst]
R[src1] << 1 →R[dst]
R[src1] >> 1 → R[dst]
|~R[src1] → R[dst]
R[src1] ^R[src2] → R[dst]
R[src1]|R[src2] → R[dst]
R[src1] & R[src2] → R[dst]
R[src1] +1 →R[dst]
If R[src1] = 0, branch to BAddr
If R[src1]<0, branch to BAddr
Ox0
SUB
Ox1
SLL
Ox2
SRL
Ох3
INV
Ox4
XOR
Ох5
OR
Ох6
AND
Ox7
INCR
Ox8
BRZ
Ox9
BLEZ
ОХА
Jump to JAddr
Stop execution
JUMP
OxE
HALT
OxF
Transcribed Image Text:The following instruction set is supported by a simple processor, which is similar to what we discussed in the class, with a few new instructions added. The format of most instructions is defined as follows. bits 15:14 13:10 9 8:6 5:3 2:0 field unused opcode w srcl src2 dst where the fields are defined as follows. opcode : operation to be performed by the processor write back ALU output to register file (1= yes, 0 = no) address of the first ALU operand in the register file address of the second ALU operand in the register file address in the register file where the output is written w: srcl: src2: dst: For opcodes BEQ, BLEZ and JUMP, the 6 least significant bits (5:0) give an address in the instruction memory, which is byte-addressed. The opcode HALT has all operand bits (9:0) being 0. When an instruction has only two operands, the field for the unused operand is filled with 0-bits. For example, bits (5:3) for SLL are all zero because src2 is not used. The opcode and meaning of these instructions are listed in the following table. орcode ADD Binary encoding Operation R[src1] +R[src2]→ R[dst] R[srcl] – R[src2] → R[dst] R[src1] << 1 →R[dst] R[src1] >> 1 → R[dst] |~R[src1] → R[dst] R[src1] ^R[src2] → R[dst] R[src1]|R[src2] → R[dst] R[src1] & R[src2] → R[dst] R[src1] +1 →R[dst] If R[src1] = 0, branch to BAddr If R[src1]<0, branch to BAddr Ox0 SUB Ox1 SLL Ox2 SRL Ох3 INV Ox4 XOR Ох5 OR Ох6 AND Ox7 INCR Ox8 BRZ Ox9 BLEZ ОХА Jump to JAddr Stop execution JUMP OxE HALT OxF
1. In this part you are asked to recognize what a given segment of machine code does, by translating it
into assembly code, and annotating it with expressions in a high level language like C. This process,
from binary code back to source code, is called "disassembling." Disassemble the following machine
code into operations and arguments, e.g., ADD R1, R2, R3. Explain what the whole program does,
either in plain English (e.g., it calculates the product of R1 and R2) or in C type of pseudo code (e.g,
R3 = R1 * R2.) Note: you need to make up unique labels for branch instructions in your assembly
code.
Addr:
Code
Ох00
07FF
Ох02
240E
Ох04
1E0C
Ох06
250A
Ох08
03F9
Ox0A
OE00
Охос
24C2
ОхОЕ
3C00
Transcribed Image Text:1. In this part you are asked to recognize what a given segment of machine code does, by translating it into assembly code, and annotating it with expressions in a high level language like C. This process, from binary code back to source code, is called "disassembling." Disassemble the following machine code into operations and arguments, e.g., ADD R1, R2, R3. Explain what the whole program does, either in plain English (e.g., it calculates the product of R1 and R2) or in C type of pseudo code (e.g, R3 = R1 * R2.) Note: you need to make up unique labels for branch instructions in your assembly code. Addr: Code Ох00 07FF Ох02 240E Ох04 1E0C Ох06 250A Ох08 03F9 Ox0A OE00 Охос 24C2 ОхОЕ 3C00
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