1.14 Assume a program requires the execution of 50 x 106 FP instruction 110 x 106 INT instructions, 80 x 106 L/S instructions, and 16 x 106 branc instructions. The CPI for each type of instruction is 1, 1, 4, and 2, respectivel Assume that the processor has a 2 GHz clock rate.
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Q: 3-Assume a program requires the execution of 50 × 106 FP instructions, 110 × 106 INT instructions,…
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Q: 1.14 Assume a program requires the execution of 50 x 106 FP instructions, 110 x 106 INT…
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- Assume that a program requires the execution of 125x106 FP (floating point) instructions, 130x106 INT (integer) instructions, 150x106 L/S (load/store) instructions, and 110x106 branching instructions. These instructions have CPIs of 1, 1, 8 and 4, respectively. Assume that the processor has a 5 GHz clock rate. a. Is it possible to run the program twice as fast if we improve the CPI of just the L/S instructions? If so, by how much? Show your calculations. b. What is the Speedup in the execution time of the entire program if the CPI of INT and FP instructions is reduced by 40% and that of L/S and branching instructions is reduced by 50%?5-Consider a computer running a program that requires 400 s, with 80 s spent executing FP instructions, 40 s executed L/S instructions, and 40 s spent execut- ing branch instructions. • By how much is the total time reduced if the time for FP operations is reduced by 5%? • By how much is the time for INT operations reduced if the total time is reduced by 5%? • Can the total time can be reduced by 10% by reducing only the time for branch instructions?Assume a program requires the execution of 50 × 106 FP instructions, 110 × 106 INT instructions, 80 × 106 L/S instructions, and 16 × 106 branch instructions. Th e CPI for each type of instruction is 1, 1, 4, and 2, respectively. Assume that the processor has a 2 GHz clock rate. By how much must we improve the CPI of FP instructions if we want the program to run two times faster? By how much must we improve the CPI of L/S instructions if we want the program to run two times faster? By how much is the execution time of the program improved if the CPI of INT and FP instructions is reduced by 40% and the CPI of L/S and Branch is reduced by 30%?
- 1. Consider a machine running a program with four classes of instructions: A/B/C/D. The program requires 360 seconds, with the number of seconds executing each class as shown in the table below: Instruction Class A B C Time (sec) 100 80 120 60 1.1. By how much is the total execution time changed if the time for class D is reduced by 20% and the time for class C is increased by 10% (assuming no other changes)? 1.2. If we want to reduce the total execution time by 20% by optimizing class A only, what is the target execution time of class A instructions in order to achieve the reduction (assuming all other instructions are not changed)? 1.3. Can the total time be reduced by 25% if we only optimize class B? Use calculation to justify your answer.2.1 A benchmark program is run on a 40 MHz processor. The executed program consists of 100,000 instruction executions, with the following instruction mix and clock cycle count: Instruction Type Instruction Count Cycles per Instruction Integer arithmetic 45,000 1 Data transfer 32,000 Floating point 15,000 Control transfer 8000 Determine the effective CPI, MIPS rate, and execution time for this program.Q1: Consider two computers, P1 and P2, of the same instruction set (ISA). We have a program of 7.5x10° instructions and we want to run this program on P1 and P2. The P1 computer is a 5 GHz machine with CPI of 0.8. The P2 computer is a 6 GHz machine with CPI of 1.2. Which computer is faster?
- Consider a hypothetical computer having instruction length 32 bit and Byte addressable memory. You need to run a program P having 10 Q.4 CO4 instructions 11,12,13...10. All the instructions are stored in consecutive memory locations started from 1000. To run an instruction li, you have to complete four operations: Fetch, Decode, Execute, and Store. The content of Program Counter will be after the completion of fetch operation of instruction 12. There are no jump or branch instruction in program Pone Mil Q#1: Consider the instruction: add $2, $1, $3 What registers will be written and what registers will be read to execute this instruction? Registers to be written Registers to be read Q#2: Since we only support the add instruction, we don't care much for opcodes and funct codes and shamts. Therefore, suppose our programs are given to the processor as three inputs RD, RS, and RT. Each instruction executes within 1 clock periods Translate the following program to the RW, RS, RT inputs (in binary). clock period RD RS 1 2 3 4 RS RT Program add $2, $1, $3 add $0, $0, $1 add $1, $2, $2 add $1, $1, $1 Q#3: Design the single-cycle cessor datapath (only ID, EX and WB stages) using the mong different components. following datapath components.rly s the number of bits to be transferred in each data line and data bus connectio RD cik Registers RA RB RW BusA RegWrite Bus8 Bus W ALU zero ALU result overflow RT ALUOPQ1. Compute the effective CPI for an implementation of a RISC-V CPU using The Figurel. Assume we have made the following measurements of average CPI for instruction types: Instruction All ALU operations Loads Stores Branches Jumps Program astar bzip gec gobmk h264ref hmmer libquantum mcf omnetpp perlbench sjeng xalancbmk Loads 28% 20% 17% 21% 33% 28% 16% 35% 23% 25% 19% 30% Stores 6% 7% 23% 12% 14% 9% 6% 11% 15% 14% 7% 8% Clock cycles 1.1 4.2 3.3 2.8 3.0 Branches 18% 11% 20% 14% 5% 17% 29% 24% 17% 15% 15% 27% Jumps 2% 1% 4% 2% 2% 0% 0% 1% 7% 7% 3% 3% ALU operations 46% 54% 36% 50% 45% 46% 48% 29% 31% 39% 56% 31% Average the instruction frequencies of astar and perlbench to obtain the instruction mix.
- 1A. Consider the following code: AREA ASCENDING, CODE, READONLY ENTRY MOV R8, #2 LOOPO LDR R1, [R2], #4 STR R1, [R3], #4 SUBS R8, R8, #1 CMP R8, #0 BNE LOOPO How many clock cycles are required to complete the execution of the above code on non- pipelined processor assuming each instruction will take 1 cycle to execute completely? Show calculations. How many clock cycles required to complete the execution of the above code on 3-staged pipelined processor? Draw the pipeline diagram for the same. Let one stage requires one clock cycle and assume all memory references hit in cache.Q13. A program has the following mix of instructions: Instruction Cycles Frequency 33% 17% 17% 33% Load Store Branch Arithmetic 2 2 6 1 What is the average number of clock cycles per instruction (CPI) for this program? A. 0.11 B. 9.09 C. 2.75 D. 2.35 E. 21.36Assume a program requires the execution of 50 × 106 FP instructions, 110 × 106 INT instructions, 80 × 106 L/S instructions, and 16 × 106 branch instructions. The CPI for each type of instruction is 1, 1, 4, and 2, respectively. Assume that the processor has a 2 GHz clock rate. By how much must we improve the CPI of FP instructions if we want the program to run two times faster? By how much must we improve the CPI of L/S instructions if we want the program to run two times faster? By how much is the execution time of the program improved if the CPI of INT and FP instructions is reduced by 40% and the CPI of L/S and branch is reduced by 30%? (FP: Floating Point, INT: Integer, L/S: Load Store)