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1.W: construct a bus system with MUXS for 6 registers each of 8 bits. Give the truth table.

1.W: construct a bus system with MUXS for 6 registers each of 8 bits. Give the truth table.

Electric Motor Control
Electric Motor Control
10th Edition
ISBN:9781133702818
Author:Herman
Publisher:Herman
Chapter22: Sequence Control
Section: Chapter Questions
Problem 6SQ: Draw a symbol for a solid-state logic element AND.
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Computer organization-- Question at the bottom of the page, please solve it similar to the above steps
Here, the comma is to separate two or more micro-operations that are executed at the same time. These operations must be on different registers. H.W: draw a block diagram to implement the above statement. * Note: in general the register has three control inputs: - Load input (LD): if LD = 1 (active), then new data is transferred to register, otherwise new data is inhibited from register. - Increment input (INR): if INR = 1, then the content of register is incremented by 1, otherwise the content is not changed. - Clear input (CLR): if CLR = 1, then the content of register is cleared to zero, otherwise the content is not changed. Bus system (data bus): Bus system is used to transfer data between registers in a multiple register configuration. Bus system can be constructed: a) With MUXS: Ex. : construct a bus system for 4 registers each of 4 bits. sol. : we need 4 MUXS (because 4 bits) each of 4 x 1 size ( because 4 registers): 4x1 4x1 4x1 4x1 MUX, MUX, MUX, MUX, 3210 14.4. 4. D, G B, JA, 3210 3 210 3210 ta te fn fo D IG TB, A, D, D, D, D C, GG G B, B, B, R, A A, A, A RD RC RB RA 7/4 Selected Si SO reg. RA RB 1 1 RC 1 RD *) For K registers each of n bits we need: n MUXS each of K x 1 size. 11.W: construct a bus system with MUXS for 6 registers each of 8 bits. Give the truth table. b) With three -state Buffers (not required): ##
Transcribed Image Text:Here, the comma is to separate two or more micro-operations that are executed at the same time. These operations must be on different registers. H.W: draw a block diagram to implement the above statement. * Note: in general the register has three control inputs: - Load input (LD): if LD = 1 (active), then new data is transferred to register, otherwise new data is inhibited from register. - Increment input (INR): if INR = 1, then the content of register is incremented by 1, otherwise the content is not changed. - Clear input (CLR): if CLR = 1, then the content of register is cleared to zero, otherwise the content is not changed. Bus system (data bus): Bus system is used to transfer data between registers in a multiple register configuration. Bus system can be constructed: a) With MUXS: Ex. : construct a bus system for 4 registers each of 4 bits. sol. : we need 4 MUXS (because 4 bits) each of 4 x 1 size ( because 4 registers): 4x1 4x1 4x1 4x1 MUX, MUX, MUX, MUX, 3210 14.4. 4. D, G B, JA, 3210 3 210 3210 ta te fn fo D IG TB, A, D, D, D, D C, GG G B, B, B, R, A A, A, A RD RC RB RA 7/4 Selected Si SO reg. RA RB 1 1 RC 1 RD *) For K registers each of n bits we need: n MUXS each of K x 1 size. 11.W: construct a bus system with MUXS for 6 registers each of 8 bits. Give the truth table. b) With three -state Buffers (not required): ##
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