6.- Write a C function to count the number of events (rising edges) in the TOCKI pin of the PIC18F45K50 mcu. The number of events is 800. (Assume that the TOCKI pin is already configured)
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- 11. Implement the given function f(A,B,C,D)=[(0,1,3,4,8,9,15)using 8:1 Multiplexer. 12. a. Design a control enabled JK FLIPFLOP using appropriate number of NAND gates. b.Determine the output of the given Positive edge triggered Flip flop .Assume the previous value of Q to be 0. Draw the output for the positions numbered from 1 to 5 at Q. CLK R 2Question 7 Q7. Operand A and operand B of an ALU are both negative. After the ALU performs an ADD operation, if the Sign Flag SF - 0, (A) What is the Overflow Flag OF? (B) What is the Zero Flag ZF?Question: Given the VHDL code for a 16-to-1 Multiplexer, please provide a Test Bench file. VHDL Code for a 16-to-1 Multiplexer: library IEEE;use IEEE.STD_LOGIC_1164.ALL;-- Uncomment the following library declaration if using-- arithmetic functions with Signed or Unsigned values--use IEEE.NUMERIC_STD.ALL;-- Uncomment the following library declaration if instantiating-- any Xilinx primitives in this code.--library UNISIM;--use UNISIM.VComponents.all;entity mux16to1 is Port ( w0 : in STD_LOGIC; w1 : in STD_LOGIC; w2 : in STD_LOGIC; w3 : in STD_LOGIC; w4 : in STD_LOGIC; w5 : in STD_LOGIC; w6 : in STD_LOGIC; w7 : in STD_LOGIC; w8 : in STD_LOGIC; w9 : in STD_LOGIC; w10 : in STD_LOGIC; w11 : in STD_LOGIC; s : in STD_LOGIC_VECTOR(3 DOWNTO 0); f : out STD_LOGIC);end mux16to1;architecture Behavioral of mux16to1 isbegin process (s) begin…
- Write a C code for bare metal that will perform the following functions on STM32F103rb.a) Switch on the blue LED on PB8 for 100 millisecond and switch off the LED for 150 millisecond.b) Control the speed of the motor by providing it with a signal of 75% duty cycle. The motor is connected on PA2 pin.B. Write a VHDL code to implement 4:1 multiplexer.a)Write a complete program for the PIC16F84A, with circuit connection as shown in Figure 1(a),so that it flashes the LEDs connected to Port B continuously, in the following patterns:00000000, 00000001, 00000010, 00000100, 00001000, 00010000, 00100000, 01000000,10000000 one after the other with a delay of 1 s inserted between each change of pattern. Use alook-up table to run through the patterns. [Notes: Assume 1s delay subroutine is given. You do not need to write the 1 s delay subroutine] (b) Write a complete program for the PIC16F84A to store even numbers starting from zero inmemory locations 10H to 4FH. For example, 10H should contain 0H, 11H should contain 02H,12H should contain 04H and so on.
- -Design a traffic light controller in which the traffic on an intersection crossing is controlled by a digital circuit using JK Flip-Flops in a synchronous counter. Use traffic signals with red, green and yellow lights on each side of crossing. The lights operate such that red will be on 30 sec. At, the same time, the green light of an adjacent road lights 25 sec followed by the yellow light will be on 5 sec momentarily before the red light goes off. There is a ready timer creating clock pulse of 5 sec per cycle. Design the system by doing the following steps:a) Using block diagram show the plan of circuit and mention the number of JK Flip-Flops that you need.b) Write the truth table of the synchronous counter you need for this design.c) Make the required K-maps and write the Boolean algebraic functions for each J and K inputs using the K-Maps.d) Draw the circuit for this traffic light controller.3(a): Consider the following circuit, which uses two D flip-flops with falling edge triggers along with -bit full adder. The flip-flops are controlled by a single clock, C. Suppose C, Q0 and Q1 all initially have the value 0. First, fill in the blanks in the "i " = 0 (initial state)" row to show the values of D0 and D1 at this initial time (assume the results of the adder have had time to stabilize) . Next, show the values of Q0 , Q1, D0 , and D1 once they have stabilized after the ith falling edge of the clock, where i ranges from 1 to 4. Note that both the A and Carry In inputs of the adder are (Q not ) Q'0 not Q0 None of these first four rows should be the exactly the same.Draw the transistor level of the following function
- Consider a design where, Port B reads the value of 191 in decimal from. Write a code that sends its hex value to Port A, Port C, Port D, and Port E of PICISF4520. State and prove otherwise Hint go though the Pin layoutEx4: Design a counter with 7 flip-flops that goes through the following binary repeated sequence: 0, 1, 3, 7, 6, 4. Show that when binary states 010 and 101 are considered as don't care conditions, the counter may not operate properly. Find a way to correct the design with don't care and without don't care The number of flip-flops required is three. • Table below shows the desired circuit excitation table. Present Next Flip-flop inputs state state ABC ABC TA TB C 000 001 0 0 1 001 011 0 1 0 010 XXX X X X 011 111 1 1 0 100 000 1 1 0 101 XXX X X X 110 100 0 1 0 111 110 0 0 1Q ( 5 Find a ready-made combined logic circuit description or write it yourself directly. The module should have at least 4 ports, and at least one port should be 8-bit. Then verify with UVM using this module as DUT (Design Under Test).SystemVerilog hardware description language should be used.