Following is the memory map begining from addre= ACOOH and increasing addresses to the right, all in hex : 33, 5F, 00, FF, DE, C1, BB, 5E, 77, 95, 8C, ... Write down the value of each register after executir each instructon: MOV SP, 44038 POP DI
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A: ANSWER:-
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- Q1:/ Show the contents in hexadecimal of registers PC, AR, DR, AC, IR and SC of the basic computer when an instruction at address 021 in the basic computer has I = 1, an operation code of the ADD instruction, and an address part equal to 051. The memory word at address 051 contains 0083. The memory word at address 083 contains B8F2. The memory word at address 038 contains A837 and the content of AC is A937. Give the answer in a table with six columns, one for each register and a row for each timing signal. (All numbers are in hexadecimal) uipors - eaQuestion 4: There is an application that requires the hardware: an Intel 8031, a Program ROM of 8Kx8, a Data ROM of 4Kx8 for look-up tables, TWO Data RAMs of 8Kx8. The memory map of the design should be: Program ROM should start at address 0000μ. Then, the Data ROM should come above the Program ROM. Finally the Data RAMs must go to the top of the memory map. There should be no gaps between the memory addresses of the external ROMs or RAMS. A. Using logic gates, draw the pin connections of the design. Label your diagram fully. B. Calculate the address space of the ROMs and RAMs of your design. C. Show the design's address space on a memory map, starting with 0000μ at the bottom and FFFFH at the top.There is an application that requires the following hardware: an Intel 8031, a Program ROM of 8Kx8, a Data ROM of 4Kx8 for look-up tables and a Data RAMs of 8Kx8. The memory map of the design: Program ROM should start at address 0000H. Then, the Data ROM should come above the Program ROM. Finally the Data RAM must go to the top of the memory map. There should be no gaps between the memory addresses of the external ROMs. Show the design’s address space on a memory map, starting with 0000H at the bottom and FFFFH at the top.
- There is an application that requires the following hardware: an Intel 8031, a Program ROM of 8Kx8, a Data ROM of 4Kx8 for look-up tables and a Data RAMs of 8Kx8. The memory map of the design: Program ROM should start at address 0000H. Then, the Data ROM should come above the Program ROM. Finally the Data RAM must go to the top of the memory map. There should be no gaps between the memory addresses of the external ROMs. Calculate the address space of the ROMs and RAMs of your design.R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 R24 R25 R26 R27 R28 R29 R30 R31After the instruction Idr ro, [r1] is executed, what is the content of ro? O A. The 8-bit value located at the memory address stored in r1 B. The memory address where r1 is stored O C. The 32-bit value located at the memory address stored in r1 O D. A copy of r1
- 6. What is the address of executing the following instruction: MOV CX, [FEH] if you know that DS= DC00H? OCL: DCOFEH, CH: DCOFFH OCL: DCFEH, CH: DCFFH CL: DCFFH, CH: DCFFH CL: DCOFFH, CH: DCOFFH6. Update memory values for the following code. Keep track of the loop counter (R16) and index register values as you go through the loop. LDI R16,3 R15, Y+ -Z, R15 LOOP: LD ST DEC R16 BRNE LOOP STS 0x0200, R28 CPU Register R28 (YLB) R29 (YB) R30 (ZUB) R31 (ZHB) Value OxFC 0x01 0x04 0x02 Data Memory Value 0x21 0x02 0x11 0x03 Address 0x01FC 0x01FD 0x01FE Ox01FF Ox0200 0x0201 Ox0202 Ox0203Q1- Write a program in assembly language for the 8085 microprocessor to send 10 bytes of data located at the memory address (3000H to 3009H) using SOD at a baud rate of 1200. Information: The 8085 processor operates at a frequency of 3.072 MHz. When sending each of the required bytes, you must adhere to the following: The two high bits of the start bits must be sent, after that the data bits are sent, after that the low bit of the stop bit is sent. The following flowchart will help you, but you should notice that this flowchart deals with one byte, and you are required to deal with 10 bytes. The solution must be integrated and include the calculation of the baudrate delay time Transmit No Set up Character Bit Counter Send Start Bit Wait Bit Time Get Character in Accumulator Output Bit Using Do Wait Bit Time Rotate Next Bit in Do Decrement Bit Counter Is It Last Bit? Yes Add Parity if Necessary • Send Two Stop Bits Return (a)
- Suppose we have the instruction Load 0000. Given memory and register R1 contain thevalues below:R130Memory Address Content0000 40...0010 30...0020 78...0030 55...0040 77...0050 84 Assuming R1 is implied in the indexed addressing mode, determine the actual value loaded into the accumulator using the following addressing modes: a. Immediateb. Directc. Indirectd. IndexedThe following tables contains memory dump and contents of few registers, as follows: add cont reg cont OXAO Ox72 eax 0x9C Ох9C Оx23 есх Ох11D Ох9Е Ох11 edx 0x40 OXA2 Ox41 After executing the following assembly line lea edx, [eax] The destination is ---- and its contents is Select one: а. еax, Ox 9C b. edx, Ox 23 C. edx, 0x 9C d. eax, Ox 23QuedT: Choose the correct answer: [ Opcode, funct3 and funct7/6 in instruction format are used to identify the: (a) function. (b) instruction. (e) branch. (d) memory address. The register that hold the address of the current instruction being executed is called: (a) saved register. (b) global pointer. (e) stack pointer. (d) program counter. Placing the executable file into the memory for execution by the processor is the role of (a) assembler. (b) linker. (e) loader. (d) compiler. The part which responsible for transmitting the data to/from the processor is: (a) control unit. (b) Datapath. (c) data bus. (d) memory. Parallel hardware cannot be used for faster division because: (a) subtraction is conditional on sign of remainder. (b) multiplication is conditional on sign of remainder. (c) subtraction is conditional on sign of divisor. (d) multiplication is conditional on sign of divisor. we cannot slower the clock cycle to fit the floating-point adder algorithm into one clock cycle…