Use a multiplexer having three data select inputs to implement the logic for the function F = Em(0,1,2,3,4,10,11,14,15)
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- A 9-bit asynchronous counter has a 128-kHz clock signal applied. (1) What is the MOD number of this counter? MOD number = (ii) What will be the frequency at the MSB output? fmsb = (iii) Assume that the counter starts at zero. What will be the count after 635 input pulses? After 635 input pulse, Count =A 9 bit asynchronous counter has a 128 - kHz clock signal applied. i) What the mod Number of this counter ? ii) What will be the frequency at the MSB output ? iii) Assume that the counter starts at zero.What will be the count after 6.15 input pulse?Write a Verilog code with testbench for 16-bit up/down counter with synchronous reset and synchronous up/down.If up/down is set the counter is up counter and if it is not set, the counter is a down counter. submit the module code, testbench code, and the simulation results. PLEASE EXECUTE CODE IN VERILOG
- 1. Implement 8-to-1 multiplexer with active low enable input using Logic Gates.A frequency counter is gated on for 10 ms and counts 540 pulses from a periodic input signal . What is the input frequency? a) If the gate time is changed to 100 ms , approximately how many counts would you expect from the same source during the gate time? b) In what way does the change in the gate time affect the resolution?A multiplexer a.Takes a single data input and routes it to one of several outputs b.Selects from many data sources c.converts a binary code input to a single output d.converts a single input to a binary code
- 1. Consider the CRC generator shown below. Determine the output of the CRC circuit (i.e. Q4 Q3 Q2 Q1 Q0, expressed as a decimal number) for the input sequence "1010" (input one bit at a time, left to right). Assume the CRC circuit is initialized to state 11111. D Q0 Q2 Q4 Q1 Q3 Clock - Data InWhich statement describe a digital signal? a. is a smoothly and continuously varying voltage or current. b. will take on finite set of voltage levels. c. take on all possible values of amplitude. d. can have an infinite number of values in a rangePlease Follow Question List the outputs of Encoder at BCD indicators for each of the eight input pulses shown in Figure; (((Remember the activates of HIGH (1) that has a LOW (0) input.))): BCD output indicators 8s 4s 2s 1s D Encoder 3 B 6. 48 d9 (74147) 1 Add file
- 1- What does the VoH parameter of a logic IC refer to? a) The highest permissible output voltage. b) The lowest output voltage recognized as logic 1. c) The highest output voltage recognized as logic 1. d) The highest output voltage recognized as logic 0.A 16-bit successive approximation ADC is to be designed to operate at 50,000 conversions/second. What is the clock frequency? How rapidly mustthe unknown and reference voltage switches change state if the switch timing delay is to be equivalent to less than 0.1 LSB time?8085 microprocessor went through its manipulation operation in the ALU, the results was transferred on the data bus and status of the results was stored in the flag register for indications . With your knowledge and understanding illustrate a complete bit configuration of 8085 flag register and show the functions of the represented bits in the register.