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Write a C program and corresponding assembly program based on MIPS ISA that reads three edges for a triangle and computes the perimeter if the input is valid

Write a C program and corresponding assembly program based on MIPS ISA that reads three edges for a triangle and computes the perimeter if the input is valid

Computer Networking: A Top-Down Approach (7th Edition)
Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
Section: Chapter Questions
Problem R1RQ: What is the difference between a host and an end system? List several different types of end...
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[Note: You are allowed to use only instructions implemented by the actual MIPS hardware
provided in attached photos below.  Use assembly language format from the references or
the book. Note, base ten numbers are listed as normal (e.g. 23), binary numbers are
prefixed with 0b and hexadecimal numbers are prefixed with 0x.] 

 Write a C program and corresponding assembly program based on MIPS
ISA that reads three edges for a triangle and computes the perimeter if the input is valid.
Otherwise, display that the input is invalid. The input is valid if the sum of every pair of
two edges is greater than the remaining edge. 

[Direction: You can consult any resources such as books, online references, and videos
for this assignment, however, you have to properly cite and paraphrase your answers
when it is necessary.] solve it any how urgently please.

Arithmetic and Logical Instructions Instruction Operation $d = $8 + $t $d = $s + $t add $d, $s, St addu $d, Ss, St addi St, $s, i addiu $t, $s, i and $d, $s, St. andi St, $s, i div $s, St divu $s, St mult $s, St multu $s, St nor $d, $s, St or $d, $s, St. ori St, Ss, i sll Sd, St, a slly Sd, St, Ss sra $d, St, a srav Sd, St, Ss srl $d, St, a srly $d, $t, $s sub $d, Ss, St subu Sd, $s, St xor Sd, Ss, St. xori Sd, $s, i $s+SE (i) $t = $t = $8+ SE (1) $d = $s & $t $s & ZE(1) $t = lo $s / $t; hi = $s % $t lo = $s / $t; hi = $s % St hi: lo = $s * $t hi:lo= $s* $t $d($s $t) $d = $s | $t $t = $s | ZE(1) $d = $t << a $d $t << $s $d=$t >> a $d = $t >> $s $d = $t >>> a $d = $t >>> $s $d $s $d = $s $d = $s $d $s Constant-Manipulating Instructions Instruction lhi St, i llo St, i Instruction slt Sd, $s, St sltu Sd, Ss, St slti St, Ss, i sltiu St, $s, i and andi div divu mult multu nor or ori ally sni srav sel selv sub aba Instruction add addu addi addiu xor xori Blo Operation HH ($t) = i LH(St) = i Comparison Instructions Operation $d= ($s < $t) $d = ($s < $t) $t= ($s < SE (1)) $t = ($s < SE(i)) Syntax ArithLog DivMult Shift Shift V JumpR MoveFrom Move To Load! Branch BranchZ LoadStore Jump Trap MIPS Reference Sheet ArithLogl o St, Ss, i o St, immed32 o Sa, St, label. o Sa, label o St, i (Sa) o label oi Template f $d, Ss, St f $s, St f $d, St, a f $d, St, Sa f So f $d f Ss 100000 100001 001000 001001 100100 001100 011010 011011 011000 011001 100111 100101 001101 000000 000100 $t $t $t ZE(1) Opcode/Function 000011 000111 000010 000110 100010 100011 Register Immedinte Jump 100110 001110 011001 011000 Shift Shift V Shift Shift V Register Register Shift Shift V Register Register Register Register Register Immediate Syntax ArithLog ArithLog ArithLogl ArithLogl ArithLog ArithLogl Div Mult Div Mult Div Mult Div Mult ArithLog ArithLog ArithLogl Jump Jump Instruction beq $s, St, label bgtz $s, label blez $s, label bne $s, St, label Instruction j label jal label jalr Ss jr $s ArithLog ArithLog ArithLog ArithLogl Loadl Loadl Instruction lb St, i(Ss) Ibu St, i(Ss) lh St, i(Ss) lhu St, i(Ss) lw St, i(Ss) Instruction Syntax Encoding Comments Instruction sb St, i(Ss) sh St, i(Ss) sw $t, i($s) Instruction mfhi Sd mflo Sd mthi Ss mtlo Ss Instruction trap 1 trap 5 trap 10 trap 101 trap 102 Instruction Encodings 000000es sasttttt dddddaan saffffff oo0o0oss ssttttt iiiiiiiiiiiiiiii 000000ii iiiiiiiiiiiiiiiiiiiiiiii Opcode Table sit situ alti sitiu beq bgtz blez bne Branch Instructions 1 jal jalr jr. lb Ibu Th Ihu Iw Operation if ($s = $t) pc += i << 2 if ($s > 0) pc += i << 2 sb sh ww if ($s <= 0) pc += 1 << 2 if ($s != $t) pc += i << 2 Exception and Interrupt Instructions Operation Immediate i is high or low 16 bits of immed32 Immediate i is calculated as (label-(current+4))>>2 Immediate i is calculated as (label-(current+4))>>2 Immediate i is calculated as label<<2 Jump Instructions mflo Operation pc +1 << 2 Store Instructions Operation MEM [$s + i]:1= LB ($t) MEM [$s+ i]:2 = LH ($t) MEM [$s+ i]:4 = $t Data Movement Instructions. malo trop $31 pc; pc +=i<< 2 $31 pc; pc = $s pc = $s Load Instructions Operation $t SE (MEM [$s + i]:1) $t = ZE (MEM [$s + i]:1) $t $t $t MEM [$s + i]:4 Instruction Opcode/Function Syntax ArithLog Arithlog ArithLogl ArithLogl Branch SE (MEM [$s + i]:2) ZE (MEM [$s + i]:2) Operation $d = hi $d 10 hi= $s 1o $s Print integer value in $4 Read integer value into $2 Terminate program execution Print ASCII character in $4 Read ASCII character into $2 101010 101001 001010 001001 000100 000111 000110 000101 000010 000011 001001 001000 100000 100100 100001 100101 100011 101000 101001 101011 010000 010010 010001 010011 011010 Branch Branch Branch Jump Jump JumpR JumpR LoadStore LoadStore LoadStore LoadStore LoadStore LoadStore LoadStore LoadStore Move From MoveFrom Move To Move To Trap
Transcribed Image Text:Arithmetic and Logical Instructions Instruction Operation $d = $8 + $t $d = $s + $t add $d, $s, St addu $d, Ss, St addi St, $s, i addiu $t, $s, i and $d, $s, St. andi St, $s, i div $s, St divu $s, St mult $s, St multu $s, St nor $d, $s, St or $d, $s, St. ori St, Ss, i sll Sd, St, a slly Sd, St, Ss sra $d, St, a srav Sd, St, Ss srl $d, St, a srly $d, $t, $s sub $d, Ss, St subu Sd, $s, St xor Sd, Ss, St. xori Sd, $s, i $s+SE (i) $t = $t = $8+ SE (1) $d = $s & $t $s & ZE(1) $t = lo $s / $t; hi = $s % $t lo = $s / $t; hi = $s % St hi: lo = $s * $t hi:lo= $s* $t $d($s $t) $d = $s | $t $t = $s | ZE(1) $d = $t << a $d $t << $s $d=$t >> a $d = $t >> $s $d = $t >>> a $d = $t >>> $s $d $s $d = $s $d = $s $d $s Constant-Manipulating Instructions Instruction lhi St, i llo St, i Instruction slt Sd, $s, St sltu Sd, Ss, St slti St, Ss, i sltiu St, $s, i and andi div divu mult multu nor or ori ally sni srav sel selv sub aba Instruction add addu addi addiu xor xori Blo Operation HH ($t) = i LH(St) = i Comparison Instructions Operation $d= ($s < $t) $d = ($s < $t) $t= ($s < SE (1)) $t = ($s < SE(i)) Syntax ArithLog DivMult Shift Shift V JumpR MoveFrom Move To Load! Branch BranchZ LoadStore Jump Trap MIPS Reference Sheet ArithLogl o St, Ss, i o St, immed32 o Sa, St, label. o Sa, label o St, i (Sa) o label oi Template f $d, Ss, St f $s, St f $d, St, a f $d, St, Sa f So f $d f Ss 100000 100001 001000 001001 100100 001100 011010 011011 011000 011001 100111 100101 001101 000000 000100 $t $t $t ZE(1) Opcode/Function 000011 000111 000010 000110 100010 100011 Register Immedinte Jump 100110 001110 011001 011000 Shift Shift V Shift Shift V Register Register Shift Shift V Register Register Register Register Register Immediate Syntax ArithLog ArithLog ArithLogl ArithLogl ArithLog ArithLogl Div Mult Div Mult Div Mult Div Mult ArithLog ArithLog ArithLogl Jump Jump Instruction beq $s, St, label bgtz $s, label blez $s, label bne $s, St, label Instruction j label jal label jalr Ss jr $s ArithLog ArithLog ArithLog ArithLogl Loadl Loadl Instruction lb St, i(Ss) Ibu St, i(Ss) lh St, i(Ss) lhu St, i(Ss) lw St, i(Ss) Instruction Syntax Encoding Comments Instruction sb St, i(Ss) sh St, i(Ss) sw $t, i($s) Instruction mfhi Sd mflo Sd mthi Ss mtlo Ss Instruction trap 1 trap 5 trap 10 trap 101 trap 102 Instruction Encodings 000000es sasttttt dddddaan saffffff oo0o0oss ssttttt iiiiiiiiiiiiiiii 000000ii iiiiiiiiiiiiiiiiiiiiiiii Opcode Table sit situ alti sitiu beq bgtz blez bne Branch Instructions 1 jal jalr jr. lb Ibu Th Ihu Iw Operation if ($s = $t) pc += i << 2 if ($s > 0) pc += i << 2 sb sh ww if ($s <= 0) pc += 1 << 2 if ($s != $t) pc += i << 2 Exception and Interrupt Instructions Operation Immediate i is high or low 16 bits of immed32 Immediate i is calculated as (label-(current+4))>>2 Immediate i is calculated as (label-(current+4))>>2 Immediate i is calculated as label<<2 Jump Instructions mflo Operation pc +1 << 2 Store Instructions Operation MEM [$s + i]:1= LB ($t) MEM [$s+ i]:2 = LH ($t) MEM [$s+ i]:4 = $t Data Movement Instructions. malo trop $31 pc; pc +=i<< 2 $31 pc; pc = $s pc = $s Load Instructions Operation $t SE (MEM [$s + i]:1) $t = ZE (MEM [$s + i]:1) $t $t $t MEM [$s + i]:4 Instruction Opcode/Function Syntax ArithLog Arithlog ArithLogl ArithLogl Branch SE (MEM [$s + i]:2) ZE (MEM [$s + i]:2) Operation $d = hi $d 10 hi= $s 1o $s Print integer value in $4 Read integer value into $2 Terminate program execution Print ASCII character in $4 Read ASCII character into $2 101010 101001 001010 001001 000100 000111 000110 000101 000010 000011 001001 001000 100000 100100 100001 100101 100011 101000 101001 101011 010000 010010 010001 010011 011010 Branch Branch Branch Jump Jump JumpR JumpR LoadStore LoadStore LoadStore LoadStore LoadStore LoadStore LoadStore LoadStore Move From MoveFrom Move To Move To Trap
MIPS CPU INSTRUCTIONS for COSC2021 Arithmetic Family (14) TYPE 0x R 20 (21) 1 08 (09) R 22 (23) add(u) addi(u) sub(u) mult(u) div(u) sit(u) siti(u) Logical Family (13) and andi or ori xor xori nor sllv sil srlv srl srav sra Jump Family (3) |j jr jal Branch Family (6) bgtz bgez bitz blez rego, reg1, reg2 rego, reg1, imm rego, reg1, reg2 reg1, reg2 reg1, reg2 mtlo mfhi mthi rego, reg1, reg2 rego, reg1, imm "Other" Family (6) lui syscall mflo rego, reg1, reg2 rego, reg1, imm rego, reg1, reg2 rego, reg1, imm rego, reg1, reg2 rego, reg1, Imm | rego, reg1, reg2 rego, reg1, reg2 rego, reg1, imm rego, reg1, reg2 rego, reg1, imm rego, reg1, reg2 rego, reg1, imm imm reg imm beq bne Load / Store Family (8) Iw Ih(u) Ib(u) SW sh sb reg, imm reg, imm reg, imm reg, imm reg1, reg2, imm reg1, reg2, imm rego, imm (reg1) rego, imm (reg1) | rego, imm (reg1) rego, imm (reg1) rego, imm (reg1) reg0, imm (reg1) reg, imm reg reg reg reg R 18 (19) R 1A (1B) R 2A (2B) IOA (OB) R24 IOC R 25 I OD R 26 I OE R 27 R 04 R 00 R 06 R 02 R 07 R 03 J 02 R 08 J 03 1 07 1 01 101 106 104 105 123 121 (25) 120 (24) 12B 129 128 IOF ROC R 12 R 13 R 10 R11 ORDER 1,2,0 1.0 1.2.0 1.2 1,2 1,2,0 1.0 1.2.0 1,0 1.2.0 1,0 1.2.0 1,0 1,2,0 2,1,0 zero, 1,0 2,1,0 zero, 1,0 2,1,0 zero, 1,0 reg,0. reg.zero reg,one reg.zero reg.zero 1.2 1,2 1.0 1,0 1,0 1.0 1,0 1.0 zero,reg 0,0,reg reg,0,0 0,0,reg reg,0,0 REGISTERS 0 1 2 3 4 5 6 7 7 8 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 SYSCALL Service Print int Print float Print double Print string Read int Read float Read double Read string Allocate Print char 0 at vo v1 a0 a1 a2 a3 to t1 t2 t3 t4 t5 t6 t7 so $1 $3 $4 $5 s6 s7 t8 t9 ko k1 gp sp tp ra vo Send Return 1 a0 f12 f12 a0 2 3 4 5 6 7 8 a0/1 9 a0 11 a0 See fo VO ASCII CODE 0-9 start at 48 or 0x30 A-Z start at 65 or 0x41 a-z start at 97 or 0x61 '' space at 32 or 0x20 C ZOOM +
Transcribed Image Text:MIPS CPU INSTRUCTIONS for COSC2021 Arithmetic Family (14) TYPE 0x R 20 (21) 1 08 (09) R 22 (23) add(u) addi(u) sub(u) mult(u) div(u) sit(u) siti(u) Logical Family (13) and andi or ori xor xori nor sllv sil srlv srl srav sra Jump Family (3) |j jr jal Branch Family (6) bgtz bgez bitz blez rego, reg1, reg2 rego, reg1, imm rego, reg1, reg2 reg1, reg2 reg1, reg2 mtlo mfhi mthi rego, reg1, reg2 rego, reg1, imm "Other" Family (6) lui syscall mflo rego, reg1, reg2 rego, reg1, imm rego, reg1, reg2 rego, reg1, imm rego, reg1, reg2 rego, reg1, Imm | rego, reg1, reg2 rego, reg1, reg2 rego, reg1, imm rego, reg1, reg2 rego, reg1, imm rego, reg1, reg2 rego, reg1, imm imm reg imm beq bne Load / Store Family (8) Iw Ih(u) Ib(u) SW sh sb reg, imm reg, imm reg, imm reg, imm reg1, reg2, imm reg1, reg2, imm rego, imm (reg1) rego, imm (reg1) | rego, imm (reg1) rego, imm (reg1) rego, imm (reg1) reg0, imm (reg1) reg, imm reg reg reg reg R 18 (19) R 1A (1B) R 2A (2B) IOA (OB) R24 IOC R 25 I OD R 26 I OE R 27 R 04 R 00 R 06 R 02 R 07 R 03 J 02 R 08 J 03 1 07 1 01 101 106 104 105 123 121 (25) 120 (24) 12B 129 128 IOF ROC R 12 R 13 R 10 R11 ORDER 1,2,0 1.0 1.2.0 1.2 1,2 1,2,0 1.0 1.2.0 1,0 1.2.0 1,0 1.2.0 1,0 1,2,0 2,1,0 zero, 1,0 2,1,0 zero, 1,0 2,1,0 zero, 1,0 reg,0. reg.zero reg,one reg.zero reg.zero 1.2 1,2 1.0 1,0 1,0 1.0 1,0 1.0 zero,reg 0,0,reg reg,0,0 0,0,reg reg,0,0 REGISTERS 0 1 2 3 4 5 6 7 7 8 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 SYSCALL Service Print int Print float Print double Print string Read int Read float Read double Read string Allocate Print char 0 at vo v1 a0 a1 a2 a3 to t1 t2 t3 t4 t5 t6 t7 so $1 $3 $4 $5 s6 s7 t8 t9 ko k1 gp sp tp ra vo Send Return 1 a0 f12 f12 a0 2 3 4 5 6 7 8 a0/1 9 a0 11 a0 See fo VO ASCII CODE 0-9 start at 48 or 0x30 A-Z start at 65 or 0x41 a-z start at 97 or 0x61 '' space at 32 or 0x20 C ZOOM +
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