3 - Assume that a five-bit binary counter starts in state 00000b. What will your count be after 157 input pulses? a. 11111b b. 10101b c. 10001b d. 11101b e. 11011b
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3 - Assume that a five-bit binary counter starts in state 00000b. What will your count be after 157 input pulses?
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- 1What will be the state of a MOD64 counter after 90 input pulses if the starting state=000000?A.100100B.011010C.010110D.011100 2.A MOD 32 counter is holding the count 101112. What will the count be after 31 clock pulses?A.10100B.10010C.10000D.10110Subtract the following 16-bit binary numbers. a. 11001011 00101000. - 10011110 01011011, b. 10111100 10111000, - 10011000 111100112What parity bit, P, should be added to the following data if the parity is EVEN? If the parity is ODD? a. 1111100 b. 1010110 c. 0001101
- Add the following BINARY NUMBERS 110000111.00011+ 110000000.11011How to build this circuit? (on Digital or Logisim) Binary-coded decimal is an alternative method of representing integers using binary. In it, each base-10 digit is represented by four bits, thus each nibble takes one of 10 values (0000 through 1001). Therefore, using BCD, 42 (decimal) is represented as 0100 0010 (binary) and 196 (decimal) is represented as 0001 1001 0110 (binary). Create a circuit in Logisim that accepts as input a pair of two-digit integers represented as BCD and outputs their sum in BCD. Any and all Digital components are fair game. You can assume that all inputs will be valid BCD-encoded numbers.Design counter that counts from 00 to 59, using the IC 74LS90 ripple counter and use two 7 segment display to display the result count. You can also use 7447 binary to 7-segment Display Decoder in logicworks.
- 5 clock signal frequency for a 4-bit up counter is 20kHz. What is the frequency of the most valuable bit output? d) nonePerform floating point binary addition to the following: A: 1 10000011 10110111010000000000000 B: 0 10000000 10010011000100101000000 The result of A+B must be in be in 32-bit floating point. You can also check the answer in decimal.A 4-bit binary up/down counter is in the binary state of zero. The next state in the DOWNmode is (a) 0001 (b) 1111 (c) 1000 (d) 1110
- Q1. Show the implementation of 4 bit binary to gray code (shown in below table) converter using either EPROM or PLA. In Gray code only one bit changes at a time. Binary Gray code Decimal equivalent 0000 0000 1 0001 0001 0010 0011 3 0011 0010 4 0100 0110 5 0101 0111 6. 0110 0101 7 0111 0100 8. 1000 1100 1001 1101 10 1010 1111 11 1011 1110 12 1100 1010 13 1101 1011 14 1110 1001 15 1111 1000Q5/Find the addition result for the following operation (66)8+ (1100)EX-3+(83)10- (F2.1)16 using 2's complement, assume that the result is binary number O 1100000.0001 O 10011111.1111 O None of them O 110000010.111 O 1111101.0001Match the following binary code (A) into BCD representation (B): 0100 0001 0111 0110 A. 0111 B. 0110 C. 0100 D. 0001