You are given an SRAM Memory IC of size 64 KBytes arranged as 256x256x8 bits. We want to store a specific byte at row 129 and column 177. What is the input of the row decoder of this memory?
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You are given an SRAM Memory IC of size 64 KBytes arranged as 256x256x8 bits. We want to store a specific byte at row 129 and column 177. What is the input of the row decoder of this memory?
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- Which of the following is incorrect? Select one or more: In AVR, the data memory includes 32 general registers, 64 I/O registers and SRAM. In AVR, both program and SRAM memories have 8-bit data width. The AVR can read both an instruction and data from memory at the same time. The more registers we have for a CPU, the slower processing we can.c) Given a 32K x 8 RAM chips. Compute: i) the number of chips needed to build a 128K byte memory using 32K x 8 RAM. ii) the number of address lines that must be used to access the memory. iii) the number of lines connected to the address inputs of each chip, the number of lines to be used for chip select inputs and type of decoder to be used. iv) Determine the range of addresses for the 128K byte memory.Assume a memory subsystem with a cache of 8 blocks and a main memory of 64 blocks, where each block includes 8 words. a) In direct mapping, show the mapping from the numbered blocks of main memory to cache blocks . Show the address bits that identify the tag field, the index field, and the word offset b) In fully associative mapping, show the mapping from the numbered blocks of main memory to cache Show the address bits that identify the tag field, the index field, and the world offset field. c) In 2-way set associative mapping, show the mapping from the numbered blocks of main memory to cache Show the address bits that identify the tag field, the index field, and the world offset field.
- A system with 16 bits address bus can access 2^16 memory space. Estimate the size of each memory IC that will require for a memory module if the number of bits required for the chip select is 8Consider the following external memory connections to a microcontroller which is similar to that of a microprocessor. What is the size of the memory? Microcontroller RAM/ROM 3 O A. none of the choices O B. Could be 4 x 3 bits or 16 x 3 bits O C. Could be 4 x 16 bits or 4 x 3 bits O D. 4 x 2 bits O E. 8x3 bits 2Design the memory mapping between the Cache memory of 2 MB to the main memory of 4 GB using 4 way set associative method where the block or page or frame size is of 2 KB. Consider each memory location is byte addressable. Write the number of bits required for memory address, tag address, block address and block location. In above memory mapping show the final Cache memory for page number 78 in the main memory which contains set number, page number and page offset fields
- Question 4 a) Show the output waveform of a NAND gate with the inputs A, B, and C indicated in the figure below. A C b) A cache has been designed such that it has 1024 lines, with each line or block containing 8 words. Determine the line number, tag, and word position for the 20-bit address 3E9D216 using the direct mapping method. c) The table below represents 10 lines from a 256 line cache that uses direct mapping with a block size of 4 words. Identify the address of the shaded data (8C16). 3 Line# |Tag Word 00 Word 01 Word 10 Word 11 10 110101 12 34 56 78 01010154 l000111 29 32 6A D3 8C A2 BC 12 ED F3 3 001100 33 2C C8 14 110011 9A D8 FODesign a 512 k byte memory using 64 k byte chips. Show the internal design of the 64kbyte chips.Group A Question 1: 1. What is the function of cash memory? 2. Give me two differences between data bus and control bus? 3. What is the difference between HDD and SSD? 4. What is the difference between input devices and output devices? Question 2: 1. The part of computer that performs arithmetic and logic operations is.. 2. .is located in EPROM, and It is always the first program that executes when a computer is powered up. 3. The part that controls the movement of data and information between the ALU, registers and other parts of the computer is called.. 4. ROM is called non-volatile memory because..
- 6- Set BX to 4567H, CX to FEDCH and SP to A59FH, then run the instructions: PUSH BX PUSH CX a. What is the new value of SP ? b. Display the memory locations where you pushed the values of BX and CX in the stack.Explain a XYZ method of transferring data from the computer's RAM to another part of the computer without processing it using the CPU. As a sound card may need to access data stored in the computer's RAM, but since it can process the data itself, XYZ is a means of having a peripheral device control a processor's memory bus directly. It permits the peripheral, such as a UART, to transfer data directly to or from memory without having each byte (or word) handled by the processor. Draw a diagram of the unit used in XYZ and how data is transferred using this method.True or False: 1. A 16 bit data word will require a minimum of 21 bits of storage space if Hamming code error detection is implemented. 2. When writing data to a memory storage device, the first lines to be set are the data lines 3. An octal counter requires a minimum of four JK flipflops 4. In a microprocessor-based system, Dynamic Ram access times are longer than Static RAM because of the refresh requirement. 5. The clock period of the internal clockof a logic monitor must typically be longer than the clock period of the system being monitored. 6. Dynamic RAM is typically found in the Level I and Level II cache of a microprocessor.